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Cryptographic Hardware and Embedded Systems - CHES 2004 [electronic resource] : 6th International Workshop Cambridge, MA, USA, August 11-13, 2004, Proceedings / edited by Marc Joye, Jean-Jaques Quisquater.

Contributor(s): Material type: TextSeries: Publisher: Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2004Edition: 1st ed. 2004Description: XIV, 462 p. online resourceContent type:
  • text
Media type:
  • computer
Carrier type:
  • online resource
ISBN:
  • 9783540286325
Subject(s): DDC classification:
  • 005.824 23
Online resources:
Contents:
Side Channels I -- Towards Efficient Second-Order Power Analysis -- Correlation Power Analysis with a Leakage Model -- Power Analysis of an FPGA -- Modular Multiplication -- Long Modular Multiplication for Cryptographic Applications -- Leak Resistant Arithmetic -- Efficient Linear Array for Multiplication in GF(2 m ) Using a Normal Basis for Elliptic Curve Cryptography -- Low Resources I -- Low-Power Elliptic Curve Cryptography Using Scaled Modular Arithmetic -- A Low-Cost ECC Coprocessor for Smartcards -- Comparing Elliptic Curve Cryptography and RSA on 8-bit CPUs -- Implementation Aspects -- Instruction Set Extensions for Fast Arithmetic in Finite Fields GF(p) and GF(2 m ) -- Aspects of Hyperelliptic Curves over Large Prime Fields in Software Implementations -- Collision Attacks -- A Collision-Attack on AES -- Enhancing Collision Attacks -- Side Channels II -- Simple Power Analysis of Unified Code for ECC Double and Add -- DPA on n-Bit Sized Boolean and Arithmetic Operations and Its Application to IDEA, RC6, and the HMAC-Construction -- Side-Channel Attacks in ECC: A General Technique for Varying the Parametrization of the Elliptic Curve -- Switching Blindings with a View Towards IDEA -- Fault Attacks -- Fault Analysis of Stream Ciphers -- A Differential Fault Attack Against Early Rounds of (Triple-)DES -- Hardware Implementation I -- An Offset-Compensated Oscillator-Based Random Bit Source for Security Applications -- Improving the Security of Dual-Rail Circuits -- Side Channels III -- A New Attack with Side Channel Leakage During Exponent Recoding Computations -- Defeating Countermeasures Based on Randomized BSD Representations -- Pipelined Computation of Scalar Multiplication in Elliptic Curve Cryptosystems -- Efficient Countermeasures against RPA, DPA, and SPA -- Low Resources II -- Strong Authentication for RFID Systems Using the AES Algorithm -- TTS: High-Speed Signatures on a Low-Cost Smart Card -- Hardware Implementation II -- XTR Implementation on Reconfigurable Hardware -- Concurrent Error Detection Schemes for Involution Ciphers -- Authentication and Signatures -- Public Key Authentication with One (Online) Single Addition -- Attacking DSA Under a Repeated Bits Assumption -- How to Disembed a Program?.
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Side Channels I -- Towards Efficient Second-Order Power Analysis -- Correlation Power Analysis with a Leakage Model -- Power Analysis of an FPGA -- Modular Multiplication -- Long Modular Multiplication for Cryptographic Applications -- Leak Resistant Arithmetic -- Efficient Linear Array for Multiplication in GF(2 m ) Using a Normal Basis for Elliptic Curve Cryptography -- Low Resources I -- Low-Power Elliptic Curve Cryptography Using Scaled Modular Arithmetic -- A Low-Cost ECC Coprocessor for Smartcards -- Comparing Elliptic Curve Cryptography and RSA on 8-bit CPUs -- Implementation Aspects -- Instruction Set Extensions for Fast Arithmetic in Finite Fields GF(p) and GF(2 m ) -- Aspects of Hyperelliptic Curves over Large Prime Fields in Software Implementations -- Collision Attacks -- A Collision-Attack on AES -- Enhancing Collision Attacks -- Side Channels II -- Simple Power Analysis of Unified Code for ECC Double and Add -- DPA on n-Bit Sized Boolean and Arithmetic Operations and Its Application to IDEA, RC6, and the HMAC-Construction -- Side-Channel Attacks in ECC: A General Technique for Varying the Parametrization of the Elliptic Curve -- Switching Blindings with a View Towards IDEA -- Fault Attacks -- Fault Analysis of Stream Ciphers -- A Differential Fault Attack Against Early Rounds of (Triple-)DES -- Hardware Implementation I -- An Offset-Compensated Oscillator-Based Random Bit Source for Security Applications -- Improving the Security of Dual-Rail Circuits -- Side Channels III -- A New Attack with Side Channel Leakage During Exponent Recoding Computations -- Defeating Countermeasures Based on Randomized BSD Representations -- Pipelined Computation of Scalar Multiplication in Elliptic Curve Cryptosystems -- Efficient Countermeasures against RPA, DPA, and SPA -- Low Resources II -- Strong Authentication for RFID Systems Using the AES Algorithm -- TTS: High-Speed Signatures on a Low-Cost Smart Card -- Hardware Implementation II -- XTR Implementation on Reconfigurable Hardware -- Concurrent Error Detection Schemes for Involution Ciphers -- Authentication and Signatures -- Public Key Authentication with One (Online) Single Addition -- Attacking DSA Under a Repeated Bits Assumption -- How to Disembed a Program?.

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